Four-Tool Subthermionic Low-Voltage Transistor Design

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We propose and audit a passive, normal-state low-voltage transistor concept in which a Gaussian energy-selective injection channel is combined with three independently controllable ring holonomies and an orbital-exchange seam. Three thickened ring channels represent three solid-torus modules; their control phases lie on T 3, and one ring implements a Z2 (Möbius-like) exchange of two orbital rails. We prove (i) an exact, finite-temperature, finite-source–drain-bias upper bound on subthreshold swing for the step-barrier Gaussian-source model; (ii) an energy-independent transmission zero in the odd-exchange sector of a matched two-path cell, and quadratic sensitivity to small arm asymmetry away from resonant singularities; and (iii) a causal, dispersion-consistent Gaussian-contact self-energy. Two reproducible calculations are kept strictly distinct. A passive reduced-envelope benchmark at 300 K, VDD = 0.24 V, VDS = 0.10 V yields 35.48 mV/dec averaged over the preselected 10−10–10−6 A interval. A separate exact tight-binding/NEGF calculation confirms the ideal cancellation and its fragility to 0.2–3 meV arm imbalance; the latter has not established a four-decade, room-temperature device-level sub-60-mV/dec specification. Neither experimentally realized phase coherence nor manufacture-ready performance is claimed. The complete code and numerical traces accompany this source. R02 adds a solved layered two-dimensional gate field and energy-resolved dephasing probes. The retuned reference model gives a 43.44 mV/dec four-decade mean at 300 K and 12-meV probe linewidth; the stricter 0–0.24-V rail-bounded configuration gives 45.96 mV/dec but only 2.82 decades of pointwise local sub-60. R03 proves an exact coherence–arm-imbalance contrast condition, an explicit gate-detuning … [excerpt; full original in PDF]

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